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xen: arm: correct definition of DCISW (data cache invalidate by set/way)
authorIan Campbell <ian.campbell@citrix.com>
Fri, 6 Dec 2013 14:29:32 +0000 (14:29 +0000)
committerIan Campbell <ian.campbell@citrix.com>
Mon, 9 Dec 2013 15:31:05 +0000 (15:31 +0000)
commit2c7a21dd65d4f4a822f20d9d9e18fba027270aa5
treebf7cdf12e66f50656b830c1c74eb70c97523f42dtree | snapshot
parentae5d5fb58dcacaf7e2d5fbfbe7b565f401c62808commit | diff
xen: arm: correct definition of DCISW (data cache invalidate by set/way)

We don't actually use this but I was using it locally for debugging and it
tripped me up.

Also add DCCIMVAC "data cache clean and invalidate by MVA" which is the only
cache op missing from cpregs.h.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Julien Grall <julien.grall@linaro.org>
xen/include/asm-arm/cpregs.h diff | blob | history
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